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What Design Industry?
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What Design Industry?

As in all creative professions, design is both an art and a process, and both more and more depend on software solutions for computer-aided design (CAD). In Microelectronics, there are two such stems for Electronic Design Automation (EDA): Computer Assisted Engineering (CAE) for functional aspects involving schematics, simulation and test, as opposed to the topological  layout (Computer Assisted Design!) involving the physical aspects of integrated circuits and their fabrication masks. They correspond to the Soft or Firm and Hard levels respectively in the VSI glossary (Virtual Socket Interfaces).

Everything in this silicon based industry starts with and ends in sand: but it is cleansed and crystallized before being sliced into wafers!

The fabrication process is much like contactless printing, with rays of light projected through masks, a score of successive layers. It has been unfortunately compared with the steel foundry process because of their molds, while it is the real heir of the press industry with a more chemical slant.


Each of the rectangles about half a square centimeter on the silicon wafers is cut and packaged as one of the numerous integrated circuits fabricated at once by the photographic process! It is shown enlarged below.

Much like a press editor will hire writers, will acquire drawings and will gather these works into a book, then subcontract its printing, so does the modern designer of an integrated circuit. The equivalent to the procurement of predesigned drawings, for reuse into a new book, is the acquisition of so-called Virtual Components (ViC) of Silicon Intellectual Property (SIP), predesigned for reuse within a new real integrated circuit.

 

The image of inserting a virtual component into a complete circuit or System-on-Chip (SoC) is available by courtesy of our "Virtual Socket Interface Alliance" to promote this way of combining efficiency with innovation.

 

Our more complete renderings at the Soft and Firm levels of CAE and at the hard level of CAD promoting the Dolphin solutions of SoC HLE and SoC GDS.

 

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