HONEY (MEDEA +)
The project targets yield improvements through innovative design techniques in terms of redundancy, high yield libraries, yield oriented design-optimisation and place-and-route tools, and post-layout optimisations.
more information…
................................................................................................................................
ASTER (FUI)
The project targets the development of new Low Consumption architectures for sRAM in sub-micronic technological processes with a competitive area, optimum read margin and robustness to yield issues.
In order to develop these new architectures Dolphin also improves its internal design flow..
................................................................................................................................
SFINCS (ANR)
The SFINCS project investigates and develops new technologies for SoC validation.
The overall objective is to develop methodologies and solutions that produce synthesizable, synchronous or asynchronous observation monitors and test sequence generators from PSL assertions, to address Assertion-Based Verification in a wide range of application domains (GALS, mixed functions, critical systems, ...).
more information…
................................................................................................................................
DECISIF (MEDEA+)
The overall objective of this project is, by gathering the main European actors in advanced substrates and ICs, to perform the evaluation of concurrent substrate approaches and the development of appropriate thin film technologies for competitive Low Power (LP) and High Performance (HP) CMOS options.
This new project will be concentrated primarily on devices and circuit demonstration including design, performance and yield demonstration.
................................................................................................................................
SIMOD (Closed Project) (European)
SIMOD encompasses the development of a methodology for the uniform simulation of hybrid Microsystems covering all relevant system levels.
more information…
................................................................................................................................
MACROS (Closed Project) (European)
The European multi-industry collaboration project to collate best practices and develop risk-based methods for the management of physical assets.
more information…
 |
The ChipEstimate.com chip planning portal provides electronics design teams with the information and tools they need to plan future IC design projects. Working together with over 175 IP suppliers and foundries, ChipEstimate.com provides design teams with the ability to search the world’s largest semiconductor IP catalog as well as download software to help estimate IC die size, power, leakage and cost with IP of interest. To date, there are over 500 new registered users per month with 17,000 + who have performed over 65,000 design estimations through ChipEstimate.com. |
................................................................................................................................
 |
Cortus S.A. is a privately owned French company developing compact, ultra low power 32-bit RISC processors for embedded applications. IP provides the flexibility of an efficient soft core matched with a specialized instruction set extension through high performance concurrent coprocessors. Products come with a set of peripherals and a customized version of the GNU C and C++ compiler and tool chain running on Linux, Windows XP and many Unix varieties. The company is based in Montpellier, France with offices in Silicon Valley, CA and can be reached at +33 4.67.13.01.90, or
www.cortus.com
APS is a trademark of CORTUS SA |
................................................................................................................................
 |
CSEM, the Swiss Center for Electronics and Microtechnology, Inc., is a privately held research and development company active in: Applied Research, Product Development, Prototype and Low-volume Production and Technology Consulting.
Its main fields of activity are micro- and nanotechnologies, microelectronics, systems engineering, microrobotics, photonics, information and communication technologies.
The first generation of the SESAME library has benefited from the developments made by the CSEM since 98 for the ultra-low-power demanding watch industry.
The concept of Reduced Standard Cell Library has then been enriched with the second and third generation of SESAME for even better performances in low power and high density. |
................................................................................................................................
 |
Design And Reuse (D&R) was founded in 1997 to promote the Intellectual Property (IP) concept in Electronic Systems and became the worldwide leader as a B2B IP web portal ( www.design-reuse.com) connecting 37.000 users offering and searching for IPs. An unique database collects information about 7000 IPs dedicated to SoC design and its access is shared by worldwide platform in U.S and Asia such as GSA in the US, Kipex in Korea, CSIP and SSipex in China, Electronics Express in Japan, etc... |
................................................................................................................................
................................................................................................................................
 |
Keil, an ARM® company, makes C compilers, macro assemblers, real-time kernels, debuggers, simulators, integrated environments, and evaluation boards for ARM7/ARM9™/Cortex™-M3, XC16x/C16x/ST10, 251, and 8051 processor-based microcontroller families. Products available from Keil include embedded development tools, evaluation software, product updates, application notes, example code and technical support. More information on Keil is available at www.keil.com. |
................................................................................................................................
 |
Founded in 1988, Raisonance S.A. is based near Grenoble in the French Alps. The company is a specialist developer of tools for microcontrollers and SoC, and offers the most comprehensive range of tools from C Compilers to real-time emulators. By introducing innovative and unique solutions, Raisonance provides high quality dedicated products to suit the specific needs for the embedded market. Raisonance development tools are distributed and supported worldwide.
www.raisonance.com
RIDE is a trademark of Raisonance SA |
................................................................................................................................
 |
Xilinx® leads the Programmable Logic Device (PLD) market - one of the fastest growing segments of the semiconductor industry. This market features a revolutionary technology called the field programmable gate array (FPGA) that our company pioneered in 1984. Xilinx is the world's leading supplier of programmable logic solutions. We supply customers with "off-the-shelf" logic devices that customers can program to perform specific functions using the development tools we provide. This programmability provides a revolutionary alternative to fixed or custom logic devices that typically require many months to design, test, and manufacture. Xilinx customers enjoy the benefit of faster time-to-market and increased product design flexibility as a result.
More information on XILINX is available on www.xilinx.com. |
