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Presentation Sheet

FlipAPS32-051H | 32-bit processor
The 1st core for SoC Control

PRELIMINARY

 

While architectures have been more than enough optimized for 32-bit processor traditional BENCHMARKS (Dhrystone, Whetstone…), Benchmarks for CONTROL, more relevant for real-time, measurement, industrial and medical applications, have yet to be developed.
FlipAPS32-051H is the appropriate Controller for a 32-bit System-on-Chip:

  • FlipAPS32-051H is a high performance microcontroller designed to be the smallest 32-bit RISC core on the market
  • Its architecture is optimized for Ultra Low Power Consumption
  • It manages voltage islands and analog peripherals: interrupts, state and configuration registers…
  • Memory requirements are minimized thanks to 16-and 32-bit long instructions which enable High Code Density.

 

Key Features of 32-bit

  • Smallest 32-bit processor on the market with 4 DMIPS/MHz/mm2
  • Instruction set architecture optimized for embedded C code
  • 16 and 32-bit long instructions for superior code density with no mode switch
  • Pipelined Harvard architecture with out of order instruction completion (memory latency hiding)
  • The architecture enables fast preemptive context switching for RTOS
  • 32-bit ALU, with sixteen 32-bit registers.
  • 4 GB of linear addressable memory
  • Byte, half-word, word, double word and quad word data access
  • Quad word instructions enabling compact sub-routine entry/exit
  • Extensive clock gating for low power consumption
  • Top-notch software development platform PRIDE™ based on Eclipse and RIDE.
Performance Microcontroller

Applications

  • Embedded SoC control
  • Mixed signal peripheral and Mems control
  • Control of Voltage Islands for low Power
  • Portable devices
  • Adequacy for Battery Power Management
  • Smooth Upward migration from 8051/251

 

Product Overview

  • FlipAPS32-051H provides the performance of a 32-bit core for the cost of an 8-bit processor. It is especially endowed for Power management, MEMS and analog converter control.
  • FlipAPS32-051H includes embedded debug features which enables a quicker debug of your application program and allows to reduce your time to market.
  • FlipAPS32-051H, by including the relevant features of a standard 8-bit microcontroller (short interrupt latency, flexible data manipulation, easy connection to peripherals) positions itself as natural upgrade of the legacy 8051/251 with higher processing power and larger storage space.
  • FlipAPS32-051H is licensed jointly by CORTUS & DOLPHIN INTEGRATION.

 

typical connection of the FlipAPS3-2051H

Typical connection of the FlipAPS32-051H

 

Features
APS32-050H(1)
APS32-051H(2)
APS32-061H(3)
APS32-071H(4)
Architecture
Harvard, 7-stage pipe-line
Interrupts
Up to 256 interrupt sources
Area *
0.18 mm²
-
0.45 mm²
-
Frequency *
100 MHz
Processing power
0.71 DMIPS/MHz
1.13 DMIPS/MHz
Price/Performance Ratio
3.94 DMIPS/MHz/mm2
-
-
-
Leakage current **
< 6.6 µW
-
6.6 µW
-
Dynamic Power consumption **
65 µW/MHz
-
95 µW/MHz
-

(*) In slow case conditions for TSMC 0.18 um GP process (1.62 V, 125°C)
(**) In typical case conditions for TSMC 0.18 um GP process (1.8 V, 25°C)
(1) Configuration 050:Core only
(2) Configuration 051:2 timers 16-bit, 1 UART, 1 interrupt controller, 1 GPIO module, 1 JTAG emulation interface, 1 breakpoint module
(3) Configuration 051:2 timers 16-bit, 1 UART, 1 interrupt controller, 1 GPIO module, 1 JTAG emulation interface, 1 breakpoint module + multiplier co-processor
(4) Configuration 071:2 timers 16-bit, 1 UART, 1 interrupt controller, 1 GPIO module, 1 JTAG emulation interface, 1 breakpoint module

 

Deliverables

Virtual Component

  • Hard macro integration manual, Programmers & peripherals reference manual
  • Functional & Timing Digital Model (simulation model)
  • Virtual Testbench & power view (.lib)
  • ATPG pattern (STIL)
  • Abstract file (LEF)
  • Layout (GDSII)
  • Transistor netlist for LVS purpose (SPICE)

On request :

  • Cache controller: two-ways set-associative, with 8 KB capacity.
  • Additional peripherals are available at soft level (I2C, SPI, USB, AHB/APB wrapper…)
  • BIRD (Built-In Real-time Debugger), POC (Program Open Clone)

Development tools and solutions

  • Customized GNU tool set including C/C++ Compiler and ISS, incl. Coprocessor instructions
  • Embedded debug through JTAG
  • Pending: RIDE7, IDE from RAISONANCE

 

 

< 32-bit overview