Presentation Sheet SCROOGE for Power Consumption     The development of portable devices with high performance and multiple features, combined with the arrival of nanometer technologies, makes mixed-signal SoC power consumption a critical point which designers have to deal with during the whole development. The analysis of power consumption has to be performed at the earliest stage in the development flow, so that designers may anticipate potential issues and adapt the architecture with no need for backtracking.   Keep control of power consumption all along the design chain with SCROOGE.     Key features Simulate mixed-signal SoC power consumption hierarchically   Quantify power consumption of RTL designs using Liberty technology library files   Evaluate power consumption using mixed-signal testbenches   Emulate the clock trees and their power consumption before P&R   Back-annotate with accurate parasitic capacitances after P&R   Display the leakage and dynamic power consumption during transient simulation   Identify critical points (peak)   Display interactively and generate HTML reports   Product Description SCROOGE is an add-on to all ASIC options of SMASH supporting logic structural and behavioral languages, empowering the only true mixed signal simulator with capabilities to simulate dynamic power consumption and leakage. Thanks to the use of standard inputs such as the Liberty format (.lib) to define power models, Verilog or VHDL standard cell models, clock tree emulation and a friendly graphic user interface including HTML reports, SCROOGE enables to estimate the power consumption of any mixed-signal circuit before layout and to adapt its architecture accordingly. Back-annotation of SPEF parasitic capacitances provides the ability to check with high accuracy the model for consumption after layout. Hierarchical evaluation of power consumption of logic blocks, be it within a logic or a mixed signal design, to trigger design improvements. Designers can quantify power consumption, track and detect any hot point and optimize it thanks to the link with the synthesizer for selecting standard cells. Designers can quantify power consumption of peripherals and optimize application programs thanks to its link with SUCCESS™.   < SMASH Options

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