SoC GDS
System-on-Chip Graphic Display Streamer

SoC GDS Newscorner SoC GDS solutions – Spring 2006 release: SoC GDS Integrator option accelerates design in thanks to improvements in LVS sockets creation feature. The new Virtual Cut feature allows to extract just a part of a layout for verification while totally preserving data confidentiality of the rest of the SoC. SoC GDS solutions - Autumn 2005 release: discover speed and ergonomic enhancements of SoC GDS release 5.7 in addition to full OpenAccess database reading and writing abilities.

The SoC GDS family of solutions for geometry analysis and validation : Integrated hierarchy browser OpenAccess and GDSII Ultra-fast layout loading and display Multi-platform GUI and CLI Interoperable with frameworks Graphical and geometrical comparison Virtual Socket Builder Layout connectivity annotation eMicroscope simulation visualization Already established as the world’s most downloaded GDSII viewer, SoC GDS today sets new standards for interoperability, capacity and speed

At 90 nanometers and below, it is no longer possible to separate design from manufacturing, and as fabrication technologies get smaller and die sizes increase designers are faced with ever larger GDSII files. From quick and easy layout viewing to final insertions of test structures before mask generation, via advanced integration of Virtual Components through socketization and patent pending eMicroscope technology for Virtual Test, SoC GDS integrates productivity enhancing functionalities needed throughout the design creation and validation chains. Through dedicated options, SoC GDS will fit the needs of ViC suppliers, SoC integrators and process/product engineers. It is also the ideal solution to complete quality procedures for acceptance of GDSII or OpenAccess databases as needed by chip finishing teams, mask shops or silicon foundries. Running under Solaris, HP-UX, Linux and Windows, SoC GDS delivers the same unbeatable performance across all your development and delivery platforms.

SoC GDS View is the entry-level option providing optimized GDSII display capabilities including color and pattern configuration file compatibility with Cadence for drop-in replacement or complementing in design flows.

SoC GDS Multi Frame extends the speed and power of SoC GDS View with advanced hierarchical navigation, input format support complemented with OpenAccess and LEF, as well as (VC)LEF generation. Verification of layouts is accelerated through hierarchical graphic cell comparison and hierarchical display of nets annotated by SoC GDS Contrast. SoC GDS MultiFrame slashes load-times and delivers unmatched verification and validation technology.

SoC GDS Integrator enables socket creation and verification for system-level integration of ViCs (Virtual Components) as defined by VSIA (Virtual Socket Interface Alliance). Delivery of layouts is accelerated through LVS socket creation improvements, hierarchical geometrical cell comparison and a powerful interpreted scripting language for repetitive processing. The new Virtual Cut feature allows to extract just a part of a layout for verification while totally preserving data confidentiality of the rest of the SoC. SoC GDS Integrator provides full OpenAccess DataBases support (reading and writing).

SoC GDS Contrast couples SoC GDS Integrator with our patent pending eMicroscope technology to superpose simulation results from extracted netlists directly onto the layout. SoC GDS Contrast shortens your development cycles and reduces post-fabrication failures by enabling Virtual Test & Diagnostic before manufacturing test chips. Delaying electron microscopy experiments until test chips are actually manufactured is costing you money right now. SoC GDS contrast is going to shorten your development cycles and reduce post-fab failures.