SUCCESS™ Hardware - Software cosimulation   Success Newscorner How to model systems comprising electrical, electromechanical and purely mechanical elements, using the example of a semi-active car wheel suspension, where damping is controlled through a sensor. From Chip to system design using a co-verification environment - Maurer D., Voßkämper L.M. Embedded Control Europe Magazine - September 2005   SUCCESS™ with PRIDE™ in Software Debug   Mixed Signal Emulation serves to provide the software developer with a wide probing capability so as to trace-back a sequence of logic events or signal variations before a breakpoint. Separate ISS (Instruction Set Simulators) for simulating software, and electronic simulators like SMASH for simulating circuits, are readily available from diverse suppliers. They present differences in simulation speed and accuracy and in ease of use, but none can offer a complete solution for simulating a whole SoC with its application software, i.e. simulating the microprocessor together with interconnected peripherals: logic (I2C, SPI…), analog (ADC, DAC, amplifiers, PLL…), memories…, which may be described in Verilog-HDL, VHDL, SPICE, VERILOG-AMS, VHDL-AMS, C-language… PRIDE™ embeds either Raisonance's or Keil's IDE (Integrated Development Environment) together with SUCCESS, i.e. the coupling of their respective ISS with SMASH, to enable the designers with "Virtual Emulation and Software Probing" where the loss in speed is traded with the thoroughness of Probing.     > Key features Design efficiency for right-on-first-pass silicon: Multi-language capabilities Multi-domain capabilities Dynamic ERC, Jitter, Power consumption,… Ease of use Cost reduction : Save time on detecting and correcting software bugs No waste of hardware Time to Fab: Develop the hardware and software in parallel Get control and visibility on the whole design early in the flow     > Product description The co-verification between hardware (configuration of virtual components at various levels be it electrical, behavioral,…) and software (the application program runs on the Instruction Set Simulator (ISS) of the microcontroller) is handled by SUCCESS. Software developers, for an application on any processor, expect to benefit from a complete Integrated Development Environment with its debug capabilities (breakpoints, step by step, trace…), including an Instruction Set Simulator (ISS), a C-compiler, an Assembler, a Linker... SoC designers relish validating at system level, whether the microprocessor is connected correctly to each peripherals, but also validating the functionality of peripherals in their SoC environment. SUCCESS is embedded in PRIDE, the 8051 Development Platform, enlarging the trace for validating the core plus its peripherals. Thanks to the SMASH viewer, traces are easily displayed without requiring cumbersome work on the ISS.       SUCCESS in design flow: Shorten your Time-to-Market!