R&D partners

Introduction

Dolphin Integration provides worldwide Fabless semiconductor suppliers with State-of-the-Art Virtual Components of IP, which they integrate into their innovative Systems-on-Chip. This offering is backed by advanced EDA solutions also promoted for multi-level electronic simulation and power consumption assessment.

Foundries

We are happy to partner with:

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SoC Integrators

 

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Alchip’s Taiwan Office
9F, 183 TiDing Blvd.,
Sec. 2, NeiHu District,
Taipei, Taiwan 114

Phone: +886-2-2799-2318
Fax: +886-2-2799-7389
Web site: www.alchip.com

 

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Avnet ASIC Israel (www.avnet-asic.com) is a leading provider of complete ASIC and COT design and turnkey manufacturing services for fabless companies and OEMs, which develop advanced SoC devices. Our services include ASIC/SoC design flow, Logic design and architecture, Analog and mixed signal design, Structured ASIC designs, FPGA design and implementation, and Turnkey manufacturing.
In the past 20 years, AAI has successfully completed more than 250 tape-outs for the ASIC market. AAI is ISO 9001:2000 certified and qualified as an authorized design center by Fujitsu, NXP, eASIC, Tower, MHS, MIPS, ARM, and Cadence.

AAI is a subsidiary of Avnet Israel Ltd. - the Israeli branch of Avnet, Inc. www.avnet.com (NYSE: AVT), which is the world's largest B2B distributor of semiconductor products. Avnet Inc. operates in 70 countries.

 

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Industrial Technology Research Institute (ITRI), established in 1973, is a national research organization that serves to strengthen the technological competitiveness of Taiwan.

ITRI is an applied research organization across multiple industrial technology fields. Presently ITRI has focus on six technical fields: Information and Communications, Electronics and Optoelectronics, Advanced Manufacturing and Systems, Material, Chemical and Nanotechnology, Biomedical Technology, Energy and Environment. In over thirty years ITRI has been dedicated to research and development and industrial services, etc., and continued to assist Taiwan government in executing industrial technology policies and promoting industrial development by nourishing industrial technology capabilities.

www.itri.org.tw

 

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PGC, which was established in 1991, is dedicated in providing SoC design service and production turnkey service (SoC / IP / ASIC Design Turnkey Service). PGC's commitment is to provide the best quality of ASIC and after-selling service to customers who can achieve the best time to market, the most competitive price, and the most competitive position in the market.

PGC has already set up the complete SoC design service environment to enhance the competitive advantage in SoC design service. PGC also built up the capability of RTL QA service. Moreover, PGC is also aggressively to build up the IP intellectual bank based on potential application platforms. PGC is expecting to provide the best SoC solution to customers. Based on the excellent experience of more than 750 successful projects, PGC can help customer to achieve the best competitive advantage in the market, and create the win-win strategy for each other.

www.pgc.com.tw

 

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Time To Market Inc. (TTM) is one of the leading service companies, providing ASIC design and embedded software solutions to clients varying from networking, communication, consumer electronics and semiconductor industries. TTM brings proven methodologies and expertise to provide a competitive edge to the customers. Founded by a group of VLSI professionals with in-depth knowledge and experience in the field of ASIC design, TTM was incorporated in 1998 in San Jose, California. The company started its India Operations in 2000 as a VLSI training center, the first in India to offer an industry-oriented course in IC Layout Engineering. In Jan 2008, TTM started software division to provide software services in the embedded domain and mark its presence in system design and validation services.

www.time2mkt.com

Silicon IP

IP Resellers

China

Jiatao

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OEM Partners

CodeTime

Code Time Technologies is a privately held company established with the single minded goal of designing, developing and distributing the next generation of real-time kernel, and innovative middleware solutions. Building on decades of experience in telecommunications, wireless and defense, and unencumbered by legacy restrictions, the result is a clean, easy to understand kernel, with a focus on performance and reliability.

The kernel is available on platforms ranging from basic 8-bit processors all the way to symmetric multicore configurations, and maintains MISRA-C:2004 and CMSIS-RTOS compliance.

Contact
Website: www.code-time.com

 

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Keil

Keil, an ARM® company, makes C compilers, macro assemblers, real-time kernels, debuggers, simulators, integrated environments, and evaluation boards for ARM7/ARM9™/Cortex™-M3, XC16x/C16x/ST10, 251, and 8051 processor-based microcontroller families. Products available from Keil include embedded development tools, evaluation software, product updates, application notes, example code and technical support. More information on Keil is available at www.keil.com.

Contact
Website: www.keil.com

 

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Xilinx

Xilinx® leads the Programmable Logic Device (PLD) market - one of the fastest growing segments of the semiconductor industry. This market features a revolutionary technology called the field programmable gate array (FPGA) that our company pioneered in 1984. Xilinx is the world's leading supplier of programmable logic solutions. We supply customers with "off-the-shelf" logic devices that customers can program to perform specific functions using the development tools we provide. This programmability provides a revolutionary alternative to fixed or custom logic devices that typically require many months to design, test, and manufacture. Xilinx customers enjoy the benefit of faster time-to-market and increased product design flexibility as a result.
More information on XILINX is available on www.xilinx.com.

Contact
Website: www.xilinx.com

 

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Development Partners

CSEM

CSEM, the Swiss Center for Electronics and Microtechnology, Inc., is a privately held research and development company active in: Applied Research, Product Development, Prototype and Low-volume Production and Technology Consulting.
Its main fields of activity are micro- and nanotechnologies, microelectronics, systems engineering, microrobotics, photonics, information and communication technologies.
The first generation of the SESAME library has benefited from the developments made by the CSEM since 98 for the ultra-low-power demanding watch industry.
The concept of Reduced Standard Cell Library has then been enriched with the second and third generation of SESAME for even better performances in low power and high density.

Contact
Website: www.csem.ch

 

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Promotion Partners

Design and Reuse

Design And Reuse (D&R) was founded in 1997 to promote the Intellectual Property (IP) concept in Electronic Systems and became the worldwide leader as a B2B IP web portal (www.design-reuse.com) connecting 37.000 users offering and searching for IPs. An unique database collects information about 7000 IPs dedicated to SoC design and its access is shared by worldwide platform in U.S and Asia such as GSA in the US, Kipex in Korea, CSIP and SSipex in China, Electronics Express in Japan, etc...

Contact
Website: www.design-reuse.com

 

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ChipEstimate

The ChipEstimate.com chip planning portal is an ecosystem comprised of over 200 of the world's largest IP suppliers and foundries. These companies share in the common vision of helping the worldwide electronics design community achieve greater profitability and success by searching the most up-to-date silicon proven IP available with ChipEstimate.com. ChipEstimate.com provides design teams with the ability to search the world’s largest semiconductor IP catalog as well as download software to help estimate IC die size, power, leakage and cost with IP of interest. To date, over 35,000 users have joined the ChipEstimate.com community and have collectively performed over 130,000 chip estimations.

Contact
Website: www.chipestimate.com

 

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EDA

EDA Resellers

OEM

Development

Projects & WorkGroups

R&D Projects

On-going projects

Dynamic-ULP - HIGH DYNAMIC RANGE MULTIPROCESSOR FOR ULTRA LOW POWER MOBILE DEVICES (CATRENE)

The main goal of the DYNAMIC-ULP project is to develop advanced process modules, and validate a design platform (design kit, models, libraries) for reliable and manufacturable digital CMOS 22nm and 20nm technologies on 300mm wafers in the European manufacturing facilities of Crolles for STMicroelectronics.
This project is related to the grand challenge 7.3.2 "Competitiveness through Semiconductor Process Differentiation" of the VMS document edited by CATRENE, and supports the European effort towards a leading position in electronic industry by enabling design and production of 22/20 nm CMOS technologies in Europe.

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LISA: ULTRA-LOW POWER IC FOR SECURE RF APPLICATIONS

Ultra-low power circuit for secure RF applications
LISA project proposes a new RF module and antenna for contact-less smart-card market destined to banking sector, transport, identity, or the emerging market for smart devices (IoT).
This solution is compatible with existing infrastructure, without loss of performance and without external power supply ; it aims to divide by 10 the energy requirement of the card for the same performances.

Dolphin Integration role: Development of an ultra low voltage standard cells library including some specific asynchronous cells.

 

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SPICA

The SPICA project targets an innovative solution regarding verification, safety and security for critical systems. The goal is to develop methods and tools for the automatic instrumentation of critical systems on chip with components dedicated to the verification of correctness and security requirements and to the detection of system failures and malicious attacks. The originality of the approach lies in the fact that variants of similar concepts will be used for the three main design activities: system-level design, development of the embedded software, and of specialized hardware blocks.
More information…

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GyroWing

The GyroWing project is part of the global project “Smart Fixed Wing Aircraft” (SFWA), leading by the Clean Sky Joint Undertaking, whose objectives address environmental issue (by increasing the performances of aircraft) and passenger comfort (in reducing noise level).

GyroWing represents an ASIC which aims at integrating the overall electronic control required for achieving the most miniaturized gyrometer.

After a specification phase and the system modelling, the project will enable the realization of this ASIC, including a high resolution electronic part, and its characterization after prototyping.

GyroWing aims at providing high performances solutions, based on ultra-low noise analog front-end, with all its required peripherals (such as HF carrier, compensation paths, voltage reference, regulators, high voltage features…) for enabling the most integrated solution. This will result on a low volume, low weight and low bill of material final solution.

The research leading to these results has received funding from the European Union's Seventh Framework Programme (FP7/2007-2013) under grant agreement N°323522, in project GyroWing.

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THINGS2DO - THIN but Great Silicon 2 Design Objects

The program THINGS2DO is focused on building the Design & Development Ecosystem for FD-SOI-technology. The development groundwork needs to be created, in view to enable IC-products and electronic systems to be migrated into the FD-SOI environment and to take advantage of the new possibilities, which FD-SOI offers on the product- and systems-level. A new and game-changing technology such as FD-SOI can only be successful with a rich mix of product- and service-offerings in the development space.

The design/development ecosystem is based on 3 pillars:

  • EDA - design automation is the basis to perform complex design creation and porting tasks. The EDA industry in Europe is particularly powerful with implantations from the big US-based companies as well as a lively ecosystem of small and medium size European companies active in this domain.
  • IP - availability of pre-designed building blocks is an absolute must for any emerging technology. The implementation environment is a vital part in conjunction with the IP needed for every complex SOC-development.
  • Services are a combination of IP and EDA-tooling. There is a rich mix of SMEs in Europe focused on this topic, providing service offerings to bring the innovative potential of FD-SOI-technology into the leading systems and end-applications, of which Europe is so rich.

The work-packages of this project are focused on the creation and enhancement of the above 3 pillars with specific targets to European end-applications. The application domains identified for THINGS2DO are: Biomedical, Aeronautics and spatial, Personal Portable Devices, among others. They all need energy efficient systems to meet market needs.

PARADIS - (DGA RAPID)

Objectives: One of the major challenges of SoC in the deep sub-micron technologies is the control of the distribution of the power supplies and associated regulator systems. The regulator fills the capacity tanks supplying the dynamic in-rush current, which produces voltage drop on the power supply drops. The proper sizing of the regulator is a key element, but the passive distribution network (resistors of metal lines, inductance of the bonding, on-chip capacities and logic gates) has a major impact on the performances of the power supply.

Innovation: the innovations are the development of

  1. a tool to determine the best power supply network for the target application,
  2. a tool to allow the implementation of the power supply network
  3. analog blocks for the regulation of power supply

Dual use applications: for all applications under battery

More information...

EDA SoC project & outcomes

European Defence Agency and Defence Equipment Manufacturers work together around electronics and system-on-chip that are key technologies for increasing functionality and services of defense applications. Within this scope, two specific objectives involving Dolphin were defined:

  1. To set-up, at European level, an efficient access to an ASIC/SoC complete fabrication chain: silicon foundries, packaging, test houses
  2. Taking into account specific constraints from Defense Equipment Manufacturers: data confidentiality, low/medium volumes, long life cycle, ITAR-free on-demand, etc.

More information…

 

Past Projects

ICYHEART

New technology consortium set to change relationship between patients and doctors through innovative tele-health care solutions. EU, researchers, and industry leaders seek to deliver unobtrusive wireless battery powered ECG monitoring solution for ambulatory use with the ability to analyze the ECG waveform and detect abnormal events in real time. IcyHeart is a European project co-funded by the Research Executive Agency under Grant Agreement number 286130, comprising leading technology researchers and SME's from across 5 European countries.

More information...

 

 

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The research leading to these results has received funding from the European Union’s Seventh Framework Programme managed by REA-Research Executive Agency http://ec.europa.eu/research/rea (FP7/2007-2013) under grant agreement n° «286130».

AGYRA (DGA RAPID)

The AGYRA project aims at developing a set of functions for inertial measurement systems for motion sensors (accelerometer and gyrometer). Its main challenges are to integrate high precision analog and logic circuits into an ASIC for tactical grade systems, to minimize its power consumption and to provide the lowest cost solution for the military market, with civil extensions.

The ASIC could have applications for trajectory guidance, unmanned vehicles, seismic detection, GPS dead reckoning or consumer motion systems...

More information...

OPTIMYST 2

The goal of the OPTIMYST project is to propose and validate a software solution enabling to define the specifications of the components of a heterogeneous module using a global optimization based on high level modeling of the components.

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COMMON (European)

The goal of the COMON project is to address the full development chain of Compact Modeling (CM) of advanced CMOS and III-V technologies, from the technology level to the system level. The project mission is driven by the need to enhance scientific knowledge, transfer scientific and technological knowledge from academia to industry, to strengthen the European integrated circuit (IC) industry with powerful design automation methodologies and to achieve integration of European research in a fragmented area for the benefit of both young and experienced researchers.

 

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VDA-AK30 Workgroup (Germany)

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This work group within the German Association for Research in Automobile Technology (FAT) in the Association of the Automotive Industry (VDA) was established in 2003. It guides the relationship between car manufactures and their suppliers concerning simulation of heterogeneous mixed systems and model exchange by providing Modeling Guidelines, Model Libraries and work on model exchange.

ASTER (FUI)

The project targets the development of new Low Consumption architectures for sRAM in sub-micronic technological processes with a competitive area, optimum read margin and robustness to yield issues.
In order to develop these new architectures Dolphin also improves its internal design flow...

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DECISIF (MEDEA+)

The overall objective of this project is, by gathering the main European actors in advanced substrates and ICs, to perform the evaluation of concurrent substrate approaches and the development of appropriate thin film technologies for competitive Low Power (LP) and High Performance (HP) CMOS options. This new project will be concentrated primarily on devices and circuit demonstration including design, performance and yield demonstration.

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EMSIG (NRW-Germany)

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This project supports the circuit industrialization and commercialization of mixed signal circuits trough enhancing the designers' productivity and design security thanks to a hierarchical design based on the invention of detectors as extension of the “PSL-Methodology” (dynamic specification rule checks) to analog and mixed signal circuits.

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SIMOD (European)

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SIMOD encompasses the development of a methodology for the uniform simulation of hybrid Microsystems covering all relevant system levels.

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MACROS (European)

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The European multi-industry collaboration project to collate best practices and develop risk-based methods for the management of physical assets.

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HONEY (MEDEA +)

The project targets yield improvements through innovative design techniques in terms of redundancy, high yield libraries, yield oriented design-optimisation and place-and-route tools, and post-layout optimisations.

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SFINCS (ANR)

The SFINCS project investigates and develops new technologies for SoC validation.
The overall objective is to develop methodologies and solutions that produce synthesizable, synchronous or asynchronous observation monitors and test sequence generators from PSL assertions, to address Assertion-Based Verification in a wide range of application domains (GALS, mixed functions, critical systems, ...).

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International organisations

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LeClust'R
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