Mastering Integration and Application Engineering with EMBLEM

Today’s Challenges for Maintaining Silicon IP Performances at the System Level

Integration is not a long, quiet river:

  • Use of inappropriate components or components used in a bad way can lead to performance drop at the system level, even if the performance of the major contributor is as specified
  • Performance drop often remains undetected until the prototype stage
  • Costly diagnosis and modification at PCB level, due to the difficulty of identifying properly the root cause

The crux is to adequately model subsystems in order to manage in simulation potential integration and application issues that can degrade the performance of the final system!

For this reason, Dolphin Integration provides exclusive transfer of know-how for mastering integration and application engineering with EMBLEM – Efficient Modeling with Behavioral Libraries of Engineering Models.

Why Should You Attend this Session for acquiring a Know-how?

Attendees can benefit from the expertise of our engineers in identifying and managing in simulation integration issues that can have an impact on the final performance, at either the SoC or the application level, early in the design process before prototyping. They will also be able to optimize the application schematic before the SoC becomes available and thus to support their users more efficiently. It goes far beyond traditional EDA Trainings.

What Will You Learn?

The know-how transferred during this session will be about how to:

  • Identify integration or application issues for risk mastery related to power, clock, data and reference networks
  • Select appropriate models for reliable simulation results
  • Set up a virtual application board and its associated testbench for early prediction of system performances
  • Optimize application schematics for Bill-of-Material reduction
  • Evaluate the impact of power supply noise and clock jitter on the SNR of a converter

Prerequisites

This transfer of know-how requires attendees to have at least first experience in SoC integration, SoC validation or design, diagnostic of application board.

EDA solutions

Modeling and simulation are performed with SLASH, combining the schematic editor SLED and the mixed-signal simulator SMASH.

Practical information

The session lasts 2 days, during which theoretical information on the know-how will be illustrated with concrete examples for an effective transfer. Computers and learning materials are provided to the participant.
The session can be held in English, French, German, or Chinese.
Snacks, lunch and coffees are offered to the participants.

  • Receive our catalog