Accelerating Mixed Signal System Design Verification using New Diagnostic MethodASIM - STS/GMMS Workshop, Dresden, GermanyD.Dammers, D.Schollän, L.M.Voßkämper
March 05, 2009
The mixed-signal simulation of complete systems, i.e. the electronics with its attached peripherals, such as sensors and actuators, already has a firm place in today’s design process. While the verification of the digital part, mostly implemented in Verilog and VHDL, has gained a speed increase through the use of Accellera’s Property Specification Language PSL, the analog part suffers from not being supported by this language. To speed up the verification of the analog part (ABCD, C, SPICE, Verilog-A(MS), VHDL- AMS) a new methodology is needed. This paper presents enhancements to the PSL methodology for the application to mixed signal circuit design which commonly make use of mixed language for modeling. As demonstrator for this adapted methodology, we use a simple control circuit of a stepper motor to show the aspects of mixed-signal, multi- language and multi-domain...