Embedded memory IP: Via ROMs

sROMet TITAN DV

sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M

Benefits

    • REDUCE DIE COST 35% denser than alternative solutions on the market Key patent for high density with a single programming layer Via 1 programmable ROM EXTEND BATTERY LIFE Significant gain in dynamic power consumption compared to alternative ROM No leakage in memory plane and minimal leakage in memory periphery MAKE INTEGRATION EASIER Depending on memory capacity. A large number of MUX options can be selected between 8 and 128 High flexibility for address range ENABLE RIGHT ON FIRST PASS DESIGN Complete mismatch validation of the memory architecture taking in account local and global dispersion

Performances

Variants
VT Bit cell
VT Periphery
Operating Voltage
Capacity
Option mode
40 uLP_eFlash
SVT
SVT
Nominal voltage:
1.1 V +/- 10%

Low voltage:
0.9 V +/- 10%
1024 - 1179648 bits
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