Evaluation of 16-bit and 32-bit processors
(1) This version works with Microsoft Windows Vista/7/8/10 on the x86 platforms.
An efficient way to evaluate 80251 and RISC-351 microcontroller cores and assess the achievable processing power and code density, is to use SmartVision™ IDE. SmartVision™ provides two types of models:
- an ISS-based model to favor simulation speed,
- a Cycle Accurate Bit Accurate (CABA) model to enable more accurate timing simulation.
With SmartVision™, you can take into account your microcontroller sub-system including memories and peripherals. It even offers the flexibility to import your own RTL Verilog peripherals.
This simple and efficient evaluation process should spare you doing a physical evaluation with test board and FPGA!
Learn more on SmartVision™ IDE...
Contact firstname.lastname@example.org to get the area and the power consumption of the microcontroller core for a given technology process. All performances are obtained thanks to the low power and high density libraries of standard cells from Dolphin Integration.
Key features to evaluate
- Code density
- Processing power and operating frequency
- Power consumption and power efficiency
- Area of the core + its peripherals + its memories but also
- The associated development and debug tools
Factors impacting the core performances
- Instruction set architecture and C compiler
- Technology process
- Libraries of standard cell and memories
- Synthesizer constraints and optimizations
Tricks of microcontroller core evaluation
Vendors’ datasheet often express performances of microcontroller cores with different units and in different technology nodes and processes. It is thus impossible for users to compare «apples and apples» and select the microcontroller core which best suits their need only by comparing datasheets.
Additionally, it is necessary to select a microcontroller that will enable optimizing the performance of the sub-system including program memory.
For more information, read the article «Selecting an embedded MCU: How to avoid evaluation trap?».