Power management IP
A standard for embedded Power Management system
Embedding the Power Management Network (PMNet) into Systems-on-Chip (SoC) is the best approach for optimizing circuit towards reduction of BoM and power consumption.
To reach those challenges, SoCs architecture are becoming more and more complex and use voltage regulators optimized bottom-up to each load. Such custom solutions are costly and time consuming with no integration methodology. It makes the right choice for an optimal PMNet very complex for integrators.
Contrary to custom solutions, the “Reusable Power Kit Library” (RPKL), based on a standard namely DELTA and providing reusable voltage regulators, is able to reach better optimizations at entire PMNet level while easing SoC integration.
How can the DELTA standard make the difference?
The DELTA rules permits to ease PMNet selection and integration:
- Budget of 3% for IR drop allowed at Place and Route and 7% for regulator DC accuracy and modes transitions, requiring:
- Predefined upstream voltage ranges for 4 Interfaces for the Distribution of Power (IDP)
- Predefined downstream voltage ranges, qualified in reduced number, for loads
- Organization in a reduced number of structures empowered by a dozen Power Stage Units (PSU) covering the needed range of current
- Same specifications for each regulator across all fabrication processes (enabling the PMNet on either chip set or embedded in a single SoC)
- Heuristic selection through a Figure of Merit (custom FoM) of the best construct for the PMNet of a SoC
- Transfer functions, templates and profiles provided in the specifications to enable a safe matching of regulators with their loads with minimal silicon area and BoM cost through the computation and use of abacus
- New Views (Behavioral models and Transfer Functions) to enable PMNet optimization with EDA verifications
One of the 7 standardized DELTA rules is the definition of 4 Interfaces for the Distribution of Power (IDPs) in order to define reusable and flexible voltage regulators. An IDP is an interface through which the power is distributed to diverse voltage regulators, power islands or loads. The IDP level is defined by a limited voltage ranges and a maximum noise spectrum.
A one-to-one connection simply is an Interface for the Attribution of Power (IAP).
Once the IDP is defined, it is then possible to divide the regulation constraints between upstream and downstream components. As shown in the figure below, upstream voltage regulators are the ones directly connected to the power source (Li-ion battery or USB 5 V), so they need to have high-voltage protection, while the downstream ones are connected to the loads and shall be optimized for each load or power domain’s requirements (e.g. low leakage, low noise for RF or analog block…). It also enables trade-offs between conversion efficiency, area, BoM and the need for noise immunity in SoCs embedding many power domains. IDP are thus spreading the regulation constraints through PMNet architecture and then ease component selection and PMNet construction.
More about the benefits featured by IDP on the Tech Talk: Effective Optimization of Power Management Architectures through Four standard “Interfaces for the Distribution of Power”
- DELTA gathers a complete library based on all components needed for the construction of an entire optimized Power Management Network (PMNet) . It serves to LDO, DC-DC, Battery management system and companions for regulators.
- The library enables a mix of RPKL and third party components based on DELTA standard within a single PMNet
- The RPKL also includes unique and innovative components such as Over-Voltage Protection Modules and Retention Alternative Regulators
- Nodes: 180 nm down to 28 nm
Have a look at our available components catalog and product sheets by technology process
Optimizations of the voltage regulators of the RPKL:
Discover how to reach the best performance trade-off for your entire PMNet with a custom Figure-of-Merit which permits to select the righ optimized voltage regulators.